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BCM4705
(R)
Brief
SUMMARY OF BENEFITS * Turnkey hardware and software platform
* Extremely rapid development of draft 802.11n Wi-Fi(R) Access Point/Routers. * Full Linux router stack and software package platform support
Intensi-fiTM Gigabit Ethernet Draft-802.11n Processor
FEATURES * Advanced 500 DMIPS/300-MHz MIPS32(R) core
* * * * 4-way set associative 32-KB I-Cache 2-way set associative 32-KB D-Cache 4-KB Read-Ahead Cache MMU/TLB support for Linux(R)
* Flexible single-band, dual-band, and simultaneous dual-band * MIMO configurations supported
* * * * 2x2, 2.4 GHz 2x2, 2.4/5.0 GHz 3x3, 2.4 GHz 3x3, 2.4/5.0 GHz
* Advanced Gigabit Ethernet MAC
* Hardware TCP segmentation and Checksum offload * GMII, RGMII, and MII PHY connectivity
* Two USB2.0 High-speed host ports * One USB2.0 High-speed device port * DDR SDRAM controller
* 16/32-bit DDR266 and 133-MHz SDRAM support * 8 MB to 512 MB capacity * Support for 8/16/32-bit wide memory devices
* Maximum performance and high throughput
* Gigabit Ethernet LAN speeds * Over 190 Mbps TCP/IP Gigabit Ethernet to Wi-Fi bridging in single-band configuration * Over 250 Mbps TCP/IP Gigabit Ethernet to Wi-Fi bridging in simultaneous dual-band configuration
* PCI 2.3 Host interface (32 bit/33-37 MHz)
* Supports four PCI bus masters * Optional 5V-tolerant operation (PCI 2.2 support)
* Flexible architecture for low cost and alternative designs
* Allows connection to external 10/100 switches for ultra low cost applications * Platform expansion through USB2.0 * Platform expansion through PCI/Cardbus
* Advanced GPIO interface
* All GPI supports interrupt triggering capability
* Dual RS232 UART * 2.4W Low-power design
* Networked Attached Storage (NAS)
* Easily build NAS routers with included NAS software module
BCM4705 System Diagram
OVERVIEW
PLL
25 MHz
PLL DDR/SDRAM Interface EJTAG MIPS32 Core MMU
USB2 Host Ports 2 PCI 32/33 Up to four PCI Master
48 MHz
USB2 Device Port
USB2.0 Device 2-port USB2.0 EHCI
I-Cache (32 KB) D-Cache (32 KB)
DDR/SDRAM Interface
Bus I/F
PCI Interface
Internal Bus
EBI/GPIO
Dual RS232 UART
10/100/1000 MAC
Flash, GPIOs Enclosure Mgmt Thermal Mgmt
Two UART interfaces
RGMII/GMII/MII Interface
BCM4705 Block Diagram
The Broadcom BCM4705 processor is the highest performance chip in the 802.11n/MIMO Intensi-fiTM processor family. It integrates a powerful 300 MHz/500 DMIPS (*estimated) MIPS32 core with 4-way set associative 32 KB instruction cache, a 32 KB 2-way set associative data cache, and a 4 KB prefetch cache. An enhanced 10/100/ 1000 Gigabit Ethernet MAC controller with TCP Segmentation and checksum Offload (TSO) hardware acceleration engine substantially enhances system throughput. The BCM4705 integrates two USB2.0 EHCI Host ports and one USB2.0 Device port. The USB2.0 device port allows connectivity to PC or consumer electronics (CE) devices equipped with USB host ports. The BCM4705 supports a PCI 2.3 host interface and a USB host/device interface for adding application-specific peripherals including BCM4321 2x2 MIMO, BCM4318 single-chip 802.11g, BCM4309 802.11 a/b/g, BCM4320 USB2.0 WLAN, BCM5397 Gigabit Ethernet switch, and future generations of Broadcom wired, wireless, audio/video codec, and multimedia processing devices.
Broadcom(R), the pulse logo, Connecting everything(R), and the Connecting everything logo are among the trademarks of Broadcom Corporation and/or its affiliates in the United States, certain other countries and/or the EU. Any other trademarks or trade names mentioned are the property of their respective owners.
(R)
BROADCOM CORPORATION 16215 Alton Parkway, P.O. Box 57013 Irvine, California 92619-7013
(c) 2006 by BROADCOM CORPORATION. All rights reserved. 4705-PB00-R 12/05/06
Phone: 949-450-8700 Fax: 949-450-8710 E-mail: info@broadcom.com Web: www.broadcom.com

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